Nitride semiconductors for high power and high frequency electronic devices II

Resume : III-nitride materials have attracted a continuous interest due to their wide range of applications. Unfortunately, the ability to implant and activate dopants in III-nitride materials is not well understood, and it is a key technical impediment to true planar processing in the III-nitride material system. Recently we introduced a novel annealing technique coined Multicycle Rapid Thermal Annealing (MRTA), which allows to demonstrate electrical activation of Mg implanted in GaN. Development of the MRTA highlighted few key elements critical to the successful outcome of annealing. These elements include capping structure, implantation profile and regime, annealing environment, and a temperature profile. The temperature profile of the MRTA process consists of two separate, successive steps. Both steps are conducted at elevated nitrogen pressure of about 25 atm. First, the implanted GaN is annealed conventionally at temperatures at which GaN is stable on the order of 10’s of minutes. In the second step, the annealing temperature is repeatedly pulsed above 1200˚ C, accumulating the time during which GaN is exposed to these high temperatures. In this talk, we discuss recent advances in all critical elements of MRTA, as well as the development of a modified MRTA process. The new modified process named symmetrical multicycle rapid thermal annealing (SMRTA) consists of two conventional annealing steps 1 and 3, with the step 2 of rapid heating and cooling cycles in between. The improvement in crystal quality provided by SMRTA is a key step that allows realization of a p-i-n diode by Mg implantation in GaN, and opens an opportunity for a future development of Mg-implanted devices.

Resume : The technology of AlGaN/AlN/GaN heterostructures has reached advanced stage and becomes widely used in mass production of various HEMT (high electron mobility transistor) structures based semiconductor devices . Although, the impact of the growth scheme and process conditions on the electrical properties of heterostructures is fairly well described in the literature, there is still little publications concerning the topic of both the AlGaN/AlN/GaN heterostructures uniformity and yield. In this work we would like to extend the knowledge of controlling parameters describing the uniformity of heterostructures deposited by MOVPE technique by adjusting structure growth scheme. In scope of the production yield, two aspects play the key role. First, the reduction of production costs, which can be achieved by energy and chemical precursor savings (i.e. decreasing growth time or layer thickness). Second, improvement of structures uniformity by minimizing of uncontrollable processes (i.e. temperature fluctuations or heterogeneity of gaseous atmosphere) or by application of the heterostructures growth schemes, sensitivity of which can be decreased with respect to the mentioned factors. In our work we present how the GaN buffer thickness and AlGaN barrier layer thickness influences the electrical properties of the AlGaN/AlN/GaN heterostructures and the uniformity of different structures deposited on two inch sapphire substrates. The samples deposited in AIXTRON CCS 3x2'' system are characterized by SEM and PL techniques. Moreoverour own method is applied for contactless microwave measurements of 2DEG sheet resistance.

Resume : High electron mobility transistors (HEMTs) based on III-nitrides grant higher 2D electron gas (2DEG) densities due to polarization fields intrinsic to the wurtzite structure [1]. Unoptimized N-polar HEMTs suffer from large-signal dispersion and are sensitive to light due to donorlike traps within the device structure [2]. The negative impact of the traps can be mitigated by implementing an elaborate design combined with Si doping [3]. We present results obtained by positron annihilation spectroscopy in N-polar undoped and Si-doped S.I. GaN/AlGaN(:Si)/AlGaN/GaN HEMTs with graded backbarrier design where the valence band is below the Fermi level and superlattice structures with high Al content. The data show strong positron trapping at the bottom interface in the undoped sample. When the Si doping of the AlGaN layer is above 5e18 cm-3 the interface is no longer attractive to positrons. Consequently, the excess positive charge at the interface causing dispersion in undoped HEMTs is not due to donor-like traps, which would repel the positrons. On the contrary, the interface is attractive to extra holes. Our experiments on Ga-/N-polar heterostructures demonstrate positron trapping at different interfaces as predicted by theoretical modelling [4]. [1] L. Bjaalie et al., New J. Phys. 16 (2014). [2] S. Rajan et al., J. Appl. Phys. 102 (2007). [3] M. H. Wong et al., Semicond. Sci. Technol. 28 (2013). [4] I. Makkonen et al., Phys. Rev. B 82 (2010).

Resume : We have studied a variation of trap concentrations as a function of V/III ratios in Si-doped n-GaN grown by MOCVD on free standing n+-GaN substrate. The V/III ratios are varied in the range from 1700 to 4600 in the nitrogen-rich regime. The higher V/III ratios correspond to more nitrogen-rich growth conditions. As for carbon impurities, the lower V/III ratios are expected to lead to the higher carbon concentrations, confirmed by SIMS measurements. Electron traps are characterized by DLTS using bias pulses for fabricated Schottky diodes, while hole traps by MCTS using above-band-gap light pulses. Of traps observed, our study has focused on the Ec-0.59 eV electron trap and the Ev+0.86 eV hole trap, since these are the dominant electron and hole traps, respectively, in MOCVD n-GaN on n+-GaN [1]. The Ec-0.59 eV electron trap concentration increases with increasing V/III ratio, that is, more nitrogen-rich conditions. In contrast, the Ev+0.86 eV hole trap concentration decreases with increasing V/III ratio. It is found that the Ev+0.86 eV hole trap concentration shows a positive correlation to the carbon concentration. Based on these　observations, we will discuss the origin of defects with the energy levels at Ec-0.59 eV and Ev+0.86 eV which might act as carrier trapping and non-radiative recombination centers in GaN-based devices. [1] Y. Tokuda, CS MANTECH, 19 (2014).

Resume : With the high breakdown voltage, large saturation velocity, high thermal stability, and high two-dimensional electron gas (2DEG) mobility at heterojunctions, GaN is one of the promising candidates in developing next-generation power electronic devices. To ultimate improve the performance of power devices, a high-quality GaN template is very important. In this paper, the buffer layer thickness and annealing conditions were optimized to improve the optical and electrical properties of GaN grown on sapphire substrate. For the standard deposition process of GaN on sapphire, a low-temperature GaN buffer layer (LT-GaN) was firstly deposited, followed by an annealing process to form three-dimensional islands, then GaN epilayers were grown at high temperatures firstly to realize the islands coalescence and then quasi two-dimensional growth. The thickness of the LT-GaN buffer and annealing conditions are important to reduce the dislocations and improve the mobilities. In our experiment, the sapphire substrates were firstly cleaning at 1000℃ for 20min in hydrogen ambient. Then a LT-GaN buffer was deposited at 490℃, followed by the annealing process from 490℃ to 1000℃. Then GaN epilayer was grown on 1000℃ for 30 min. The growth time of LT-GaN buffer was varied from 1 to 2min, and the annealing time was changed from 7 to 10 min to obtain the optimized conditions. The structural and electrical properties of the GaN epilayers were estimated from x-ray diffraction (XRD), photoluminescence (PL), and Hall-effect measurement. It was shown that, the full-width of half-maximum (FWHM) of XRD (002)-plane rocking curve was the lowest for the sample with the LT-GaN growth time of 1 min and annealing at 10 min. However, the PL intensities and were increased with increasing buffer thickness and annealing time. The highest mobility of GaN with ~160 cm2/Vs was obtained for the sample with 2-min buffer layer and 10-min annealing time. The above results indicated that a thicker buffer layer and longer annealing time will be helpful to improve the electrical properties of the GaN grown on sapphire.

Resume : Recent developments in the heteroepitaxial growth and device characterisitics of AlGaN/GaN-based HEMTs on 200-mm silicon substrate are presented. GaN devices are excellent candidates for low-loss and high power switching applications because of its electronic properties. The advantage of utilizing Si as substrate is that it enables the growth of GaN on large diameter up to a size of 200 mm, which offers the opportunity for CMOS integration. The limiting factors for high quality GaN-on-Si are large lattice and thermal expansion-coefficient mismatches between GaN and Si, which leads to high dislocation densities, wafer bowing and crack formation. Therefore, it is imperative to grow high quality GaN-on-Si with minimum wafer bowing and without crack in order to improve the device perfomance [1]. The wafer bowing as a function of the total thickness of the epitaxial layer grown on 4-inch Si were studied. To obtain the high-breakdown voltage for GaN HEMTs on Si, the thick epitaxial layers are necessary. However, this leads to the increases in the wafer bowing and the tensile strain. Finally, this results in crack formation in the epitaxial layer when the critical thickness of GaN is exceeded. The bowing of SLS in the absence of GaN layer is high, but the bowing of the epitaxial layer can be reduced by growing the GaN layer. For instance, the bowing value of the 5.0-um-thick SLS on AlGaN/AlN ILs was 135 um. However, the bowing value can be decreased to 80 um by growing the 2.0-um-thick GaN and AlGaN barrier layers. These results indicate that the wafer bowing can be minimized by use of SLS and GaN because of counter-balance of thermal and lattice mismatches between SLS and GaN. In order to grow high quality GaN epitaxial layer, the AlN nucleation layer (NL) deposited on Si is important. The suface properties and vertical BV values as a function of AlN NL growth temperature for the samples consisting of AlN NL/Si, AlGaN IL/AlN NL/Si and SLS/AlGaN IL/AlN NL/Si were also studied. The structural and electrical characteristics confirm the AlN NL/Si greatly influence the vertical BV characteristics for GaN-on-Si [2]. The AlGaN/GaN heterostructures were grown on 8-inch Si by optimized growth conditions and by using SLS technique [3, 4]. The epi-wafer exhibited the mobility of 1750 cm2/vs, the sheet carrier density of 1x1013 cm-2 and the bowing value of 50 um. The normally-off devices were fabricated by using gate-recess and MOS technology. The devices exhibited a drain current maximum of 300 mA/mm, low leakage currents and breakdown voltage of 825 V, respectively. These results suggest the potential for normally-off devices on AlGaN/GaN heterostructures grown using SLS. REFERNCES [1] T. Egawa et al., IEEE IEDM Tech. Dig., pp. 613-616 (2012). [2] J.J. Freedsman et al., Phys. Status. Solidi A 213, 424 (2015). [3] D. Christy et al., Appl. Phys. Exp. 6, 026501-1 (2013). [4] J.J. Freedsman et al. Appl. Phys. Exp. 6, 026501-1 (2013)

Resume : GaN-based high electron mobility transistors (HEMTs) are promising devices both for high frequency and high power applications because of their high electron saturation velocity and high carrier concentration as well as the high critical breakdown field. In order to enhance the device performance, the device design and the process technology to realize the designed structure are important aspects as well as the material growth. Particularly in electron devices, the key parameters to determine the device performance such as the gate length, the gate-drain spacing, and so on, depend on the process technology. In this talk, two important technologies to improve the breakdown characteristics of HEMTs are presented. One is the slant field plate technique using multi-step SiCN dielectric film. The advantage of the slant field plates over the conventional parallel-plate gate-connected field plates is experimentally demonstrated for the first time by this approach. The advantage exists not only on the breakdown voltage but also on the RF characteristics. The other technology is the neutral beam etching which significantly reduces the plasma-induced damage on the etched surface. This result in the superior isolation breakdown voltage comparing to the conventional inductively-coupled-plasma (ICP) etching. These process technologies will be a great help on improving the power performance of HEMTs and other types of electron devices based on the GaN material system.

Resume : Mobile communication is one of the most dynamic sectors of the German economy. Hardly any other industry has shorter innovation cycles with new products coming to market faster. Mobile communication has become the biggest driver of growth in the telecommunications market and is an important economic factor which increases the competitiveness of Germany. According to the industry association BITCOM the global turnover from mobile services will grow to 600 billion euros in 2015. Of these, the mobile data services, which, at 16%, have the highest growth rate, will account for about 150 billion euros. Fraunhofer has recently designed and demonstrated an integrated broadband low-noise amplifier circuit on the basis of high frequency transistors. The amplifier was realized with the help of the GaN semiconductor technology with a gate length of 0.25 µm. Using this GaN technology, it is now possible to realize a combination of unique properties (low noise figure, high bandwidth and high linearity), which conflict with each other in other semiconductor technologies. The innovative circuit design uses a two-stage feedback architecture and GaN-transistors in a cascade structure, which yields a high bandwidth of 0.5 to 3 GHz. This ensures that all current frequency bands used in mobile communication can be covered. Measurements show that the amplifier achieves a noise figure less than 1.5 dB and a high gain of 35 dB over the entire frequency range. Due to its technical performance of this low-noise amplifier enables mobile communication using a variety of mobile phone standards in wireless networks, such as LTE or WiFi. Particular attention was paid to the design of the power cells which are the basis of large power transistors with up to 36 mm gate width. A novel approach to model the large signals of the transistors, in which all physically relevant (in particular polarization-induced) effects are mapped, supports the design of power cells and amplifier modules with highest efficiency, bandwidth and linearity. The right choice of the number of gate fingers, their length and their distances in a power cell and the use of semiconductor resistors to decouple the cells from one another allows the processing of transistors which are characterized by an extremely low susceptibility to vibration. This is an indispensable prerequisite for a simple and cost-effective assembly of transistors in high-frequency packages. The most important result in the course of the developments is to limit the maximum current flow through the transistor itself. The team managed to incorporate a boundary in the transistor by appropriate epitaxial growth of the AlGaN/GaN heterostructure, so that further outer wirings are not necessary for this purpose. The result of this measure are robust transistors which survive even extreme electrical mismatches at an operating voltage of 50 V.

Resume : Performance and reliability of AlGaN/GaN high electron mobility transistors (HEMTs) is limited by charge trapping, particularly within the access region between the gate and drain. After a high voltage OFF-ON switching event, electrons trapped at the surface deplete the two-dimensional electron gas (2DEG), resulting in an increased dynamic ON-resistance, a key metric for power switching applications. Effective surface passivation is necessary for suppressing the dynamic ON-resistance. The impact of plasma enhanced CVD (PECVD) SiN, in-situ grown SiN, atomic layer epitaxy (ALE) AlN, and combinations of these passivation materials on the dynamic ON-resistance of AlGaN/GaN HEMTs is investigated. Conventionally, dual frequency 13.56 MHz/(100-360 kHz) PECVD SiN is implemented to provide control of the film stress and quality. However, ion bombardment during the low frequency step during PECVD deposition has been identified to generate lattice damage to the surface of the AlGaN barrier, degrading the 2DEG mobility. To provide effective passivation and mitigate mobility degradation, a bilayer PECVD SiN approach is developed and optimized with thin high frequency SiN interlayer followed by dual frequency film with low stress. In addition, in-situ SiN, grown at the same time as the AlGaN/GaN layers in the metal organic chemical vapor deposition (MOCVD) reactor, preserves and protects the AlGaN surface and also provides a barrier from low frequency plasma damage from addition PECVD SiN. Finally, thin (10 nm) AlN films are grown by ALE directly on the AlGaN barrier, with conditions optimized to minimize the number of ions that reach the surface and maximize the number of active atoms to maintain the 2DEG mobility and provide low dynamic ON-resistance.

Resume : This paper presents our recent progress in GaN-based high-electron-mobility transistors (HEMTs) developed for power electronics applications. The comprehensive study on AlGaN/GaN HEMTs fabricated on a free-standing GaN substrate shows that an extracted effective lateral breakdown field of 1 MV/cm is limited by premature breakdown originating from the insufficient structural and electrical quality of GaN buffer layers and GaN substrate. The effective lateral breakdown field is improved to 2 MV/cm by using a resistive GaN substrate achieved by heavy Fe doping. Various issues relevant to current collapse are also discussed in this paper, in which more pronounced reduction in current collapse is achieved by combining some of the different process schemes, including surface passivation and surface plasma treatment. The dominant factors to reduce the effect of current collapse will be described. Finally a novel 3-dimensional field plate (3DFP) in AlGaN/GaN HEMTs is introduced, and its possibility of realizing true collapse-free operation is described.

Resume : GaN and related materials are attracting a great interest in the field of high power and high frequency devices. In particular, the use of AlGaN/GaN heterostructures enables HEMTs fabrication, due to the 2DEG formation at the interface. However, in order to optimize the efficiency of power devices, the achievement of low specific contact resistances in Ohmic contacts represents one of current technological issues. In fact, the wide band gap of AlGaN makes difficult to obtain Ohmic with low specific contact resistance. Moreover, undoped AlGaN layers are typically used to limit the scattering phenomena and optimize the 2DEG mobility. In this work the role of the processing conditions (annealing temperature, atmosphere, recession, etc.) and of the heterostructures properties on the Ohmic contact behaviour has been investigated. A modified thermionic field emission (TFE) model has been proposed to take into account the presence of the 2DEG, i.e., considering the dependence of the specific contact resistance on the heterostructures parameters (AlGaN thickness and Al concentration)..The proposed model indicated that the typical variations of Al concentration, AlGaN thickness, and sheet carrier density (from wafer-to-wafer or within the same wafer), can be responsible for the variability often detected in the measurements of the specific contact resistance in AlGaN/GaN heterostructures. These findings highlight the importance of accurately monitor the source of GaN materials for a better understanding of the Ohmic contact formation on AlGaN/GaN heterostructures.

Resume : Industrial implementation of GaN is quickly rising due to the growth of GaN structures on Si substrates. The use of the full potential offered by GaN, especially in power devices, is currently dependent on the development of adequate systems of metallization. Problems with devices operating at high current densities refer both to the reliability of contact metallization, interconnections in the area of semiconductor structures, as well as to connections with electrical terminals for packaging. Prototypical high power systems apply Au or Pt in order to protect interconnections from oxidation. A new type of interconnections could be based on Cu due to higher electrical and thermal conductivity, and considerable lower material price than for Au. Proper metallization for power devices should ensure stable electrical resistivity below 5 micro-ohm-cm after long-term thermal and electrical stresses. Our work presents fabrication technology of Cu-based interconnections for high power AlGaN/GaN HEMT transistor and results of interconnections durability. Magnetron co-sputtering deposition method was applied to create Cu alloys with Ru, Hf, Nb, NbN additives, as well as adhesion layers of Ti, NbTiN and a metallic cap film. Interconnection reliability was evaluated on test structures, where Cu lines were protected by thin metallic or dielectric cap against oxidation. The investigations suggest that crystal structure of the Cu film is stabilized by small amount of Nb or NbN additive. Moreover, Cu oxidation risk is suppressed by thin Ni-based glassy films. The best result was observed for 50 nm thick SiN coating formed by ALD. Resistance of the Cu interconnection was intact after ageing in air at 250 C for few hundreds of hours.

Resume : The AlInN/GaN heterostructure based devices has emerged as potential candidates for high power and high-frequency applications. Recently, devices fabricated using such heterostructures showed improvements in the drain current and radio-frequency characteristics [1-2]. Extended works for normally-off operation also showed high drain current [3]. The detrimental problem associated in using conventional AlInN/GaN heterostructure based field effect transistors (HFETs) is its poor breakdown voltage (BV) and is predicted due to the highly conductive GaN buffer layer and gate leakage [4]. On the other hand, a remarkable enhancement in BV was achieved in HFETs by substitution of conventional GaN channel by AlGaN channel [5]. The AlInN/AlGaN heterostructure based devices are expected to deliver high BV which is highly desirable for high-power applications and are yet to be reported. In this work, an attempt was made to grow AlInN/AlGaN heterostructure on Si substrate and the heterostructure was used to fabricate normally-off metal-oxide-semiconductor (MOS-HFETs). The Al0.85In0.15/Al0.05Ga0.95 heterostructure was grown on silicon by using metal-organic chemical vapor deposition (MOCVD). The barrier and channel layer thicknesses were 10 nm and 1 um, respectively. As grown AlInN/AlGaN showed rough surface morphology with root mean square (rms) roughness value of 0.9 nm. This surface roughness value is twice that of our AlGaN/GaN or AlInN/GaN based heterostructure. The Hall effect measurements for this heterostructure showed a high sheet carrier concentration of 3 x 10^13 cm^-2, and a sheet resistance of 2.3 kohm/sq, respectively. This accompanied a low mobility of 88 cm^2V^-1s^-1. A low mobility value is attributed to alloy disorder scattering and interface roughness scattering in AlInN/AlGaN heterostructure [6]. The MOS-HFETs were fabricated by using gate recess and 20 nm atomic layer deposited Al2O3 layer as gate oxide. Device fabrication and characterizations were according to ref. [3]. The MOS-HFETs exhibited good direct current (dc) characteristics and high off-state BV. The MOS-HFET shows low drain and gate leakage currents. A high positive threshold voltage (Vth) of 1.9 V extracted from the transfer characteristics ensured normally-Off operation. This Vth is compatible with the reported normally-off AlInN/GaN MOS-FETs [2]. The dc current-voltage characteristics shows a drain current maximum (IDS,max ) of 89 mA/mm and a specific-on resistance (Ron,sp) value of 22 mohm.cm^2 at a gate bias of 8 V. The product of carrier mobility and density (Ns x u) is low and therefore the drain current density is small. The partial depletion of the channel under the gate region further reduces the drain current and results in a high Ron,sp. This device with a gate-drain spacing of 20 um also showed remarkable off-state BV of 993 V. Further, the on-current and off-state BV can be modulated by varying the Al composition in barrier and channel layers respectively. These results of normally-off MOS-HFETs using AlInN/AlGaN/Si heterostructure are promising for future high power device applications. The challenges for AlInN/AlGaN/Si devices, BV as a function of Lgd, will be presented in detail. References: [1] J. J. Freedsman et al., Appl. Phys. Lett. 107, 103506 (2015). [2] S. Arulkumaran, et al., Jpn. J. Appl. Phys. 54, 04DF12 (2015). [3] J. J. Freedsman et al., Appl. Phys. Exp. 7, 104101 (2014). [4] J. Kuzmik et al., Phys. Stat. Solidi C, 6, S925 (2009). [5] T. Nanjo et al., Appl. Phys. Lett. 92, 263502 (2008). [6] M.Miyoshi et al., Appl. Phys. Exp. 8, 151003 (2015).

Resume : The Ru-based metallization has been considered as a reliable and thermally stable Schottky contacts for GaN-based power devices, due to its large work function andhigh melting temperature. Further improvement of Ru-based Schottky contacts can be obtained by using Ru-Si-O layers, which are conducting and characterized by amorphous microsctructure. These may lead to lowering of the leakage current by increasing Schottky barrier height, better thermal stability and resistance to corrosive atmosphere. In this work we present in-depth study of the application Ru-Si-O layer as a reliable, thermally stable Schottky contacts to AlGaN/GaN high electron mobility transistors. The Ru-Si-O barrier layers were deposited by reactive sputteringfrom Ru-Si target under variable oxygen content in the deposition plasma. The structuralproperties and chemical composition were characterized by means of x-ray diffraction, high-resolution transmission electron microscopy and atom probe tomography and revealed nanocrystalline Ru/Ru-O core/shell inclusions embedded in an amorphous Si-O matrix. The Ru-Si-O work function values asdetermined by internal photoemission spectroscopy, increased with increasing %O2 in deposition plasma from 5.65 eV for pure Ru-Si to 5.85 eV for Ru-Si-O deposited at %O2=30. The electrical properties of Ru-Si-O/AlGaN/GaN and Ru-Si-O/n-GaN Schottky contacts were investigated by measurements and analysis of current-voltage and capacitance voltage characteristics in temperature range from 25-200°C. Thermal stability of fabricated contacts was also studied. Finally, the impact of application of Ru-Si-O Schottky contacts on the electrical parameters of AlGaN/GaN high mobility transistors was examined. This work was partially funded by the European Union within European Regional Development Fund, through grant Innovative Economy (POIG.01.03.01-00-159/08, "InTechFun"), and from the Polish National Science Centre as part of PhD scholarship ETIUDA3, decision UMO-2015/16/T/ST7/00179, from the Swedish Institute as a part of Visby scholarship, and from the ITE fund, as part of PhD scholarship, decision 53.03.003.

Resume : A nano-channel (NC) T-gate Fin-High-Electron-Mobility Transistor (Fin-HEMT) was fabricated with 170 nm gate-length on In0.17Al0.83N/GaN NC with effective width (Weff) of 200 nm. The device layer structure and a complete device process details can be found in Ref [1,2]. The lattice-matched In0.17Al0.83N/AlN/GaN HEMT structure was grown on Si(111) by MOCVD system with 2DEG charge density of 2.74×1013 cm-2, 2DEG mobility of 760 cm2/V·s, and sheet resistance of 300 Ω/sq. The fabricated InAlN/GaN NC Fin-HEMTs exhibited good pinch-off characteristics and a very high drain current density (ID) of >3500 mA/mm and a highest extrinsic transconductance (gm) of >1400 mS/mm at a drain voltage of VD= 6V. Since the source resistance (Rs) of the Fin-HEMT behaves similar to the Rs of Conv. HEMT, we do not expect any enhancement in ID or gm due to Rs [2]. However, the extracted electron velocity (ve~6×107 cm/s) supports the dramatic increase of ID and gm in the InAlN/GaN Fin-HEMTs. This could be the result of modification in the optical-phonon spectrum or scattering rates, possibly due to the 3D geometry or the effective mass being altered by the stress caused by lateral scaling (fin formation) and induced in-plane tensile stress by the PECVD deposited SiN films and T-shape gate. The increase of in-plane tensile stress component by SiN passivation in the formed NC was also confirmed by micro-PL and micro-Raman measurements [2]. In addition, the InAlN/GaN Fin-HEMTs also exhibited ultra-high speed transport properties even at low operating voltage (VD) of 0.5 V [1]. These results demonstrated that through stress engineering, InAlN/GaN nano-channel Fin-HEMTs are promising for next-generation ultra-high speed device applications. [1] S. Arulkumaran et al., IEDM Tech. Digest,Dec 2014, p. 594. [2] S. Arulkumaran et al., APL 106, Feb2015, p. 053502.