Materials engineering for advanced semiconductor devices

Historically, the development of novel materials has played a crucial role in the progress of the semiconductor industry. For instance, the improvement of nanoelectronics logic devices has heavily relied on the integration of high-mobility SiGe alloys, strained silicon substrates, low contact-resistance silicides, new high-k and metal gates, etc. Similarly, wide-gap semiconductors such as SiC and GaN have been introduced for the development of new highly efficient power devices.

Today, PPAC (Power Performance Area Cost) scaling and 3D integration issues drive the continuous advancement of logic devices, whereas significant progress in the fabrication of wide bandgap materials is still required for the enhancement of the transport properties or for the improved thermal management of future power devices. In this context, the broad panel of materials currently utilized in the semiconductor industry must be further explored and optimized, while newer materials for future applications (new materials for beyond-CMOS devices or alternative wide bandgap semiconductors...) are likely to be introduced.

This symposium therefore aims to bring together materials scientists and engineers from both academic and industrial environments to discuss the latest developments in the field of semiconductor materials and related compounds for future semiconductor devices, with a focus on both the scientific and technological aspects of the fabrication, processing, characterization and applications of these materials.

Hot topics to be covered by the symposium:

The symposium will include, but will not be limited to, the following topics:

• Substrate Fabrication: epitaxial growth of semiconductor materials and related compounds (Si, Ge, SiGe, SOI, SiC, GaN, …); strained and unstrained layers; compliant substrates for heteroepitaxial growth, selective growth on patterned substrates
• Nanostructured and new materials for future devices: 2D channel materials, nanowires, nanosheets, dielectrics, materials for quantum technology
• Dopant and contact engineering: in-situ and advanced implant doping methods, silicide and germanide formation, multilevel metallization schemes (pre-cleaning, early stages of phase nucleation, interdiffusion, strain…)
• Selective and low thermal budget processes: selective dielectric deposition, localised epitaxy and etching, ultra-fast (Flash and Laser) annealing methods, radical-based surface treatments
• Surfaces and interfaces: surface passivation, structural and electrical properties of channel/dielectric and junction/metal interfaces, thin film and high-k dielectric materials… 
• Metrology and characterization: new advances in the structural and electrical characterisation of semiconductor materials and related compounds (nanoscale characterisation, 3D, …)
• Integration issues: 3D monolithic and heterogeneous integration, layer transfer
• Applications in advanced devices: nanoelectronic devices (FinFETs, FD-SOI, GAA-FETs, cryogenic MOS), high-bandgap power transistors (SiC MOSFETs and diodes, GaN HEMTs …)
• Modeling and Simulations of the above listed materials’ properties and processes (from ab-initio to continuum TCAD)

List of invited speakers:

• Laurent Brunet, CEA-Leti, Université Grenoble Alpes, France: Recent advances in 3D sequential integration
• Nadine Collaert, IMEC, Belgium: Enabling High-capacity 6G Wireless Communication: Harnessing the Potential of InP Semiconductors
• Pierre Eyben, IMEC, Belgium: Combining cutting-edge metrology techniques and TCAD to support device integration towards the 2nm Technological Node and Beyond
• Magali Gregoire, STMicroelectronics, France: Optimization of the contact engineering processes in the frame of advanced semiconductor devices development
• Antonino La Magna, CNR-IMM, Italy: Multiscale simulations of critical processes for the fabrication and functionalization of nanostructures
• Miguel A. L. Marques, Institut für Physik, Martin-Luther-Universität Halle-Wittenberg, Germany: Machine-learning-assisted determination of the global zero-temperature phase diagram of materials
• Dominique Mangelinck, IM2NP-CNRS-AMU, France: Some challenges and issues for contacts formation and stability in microelectronics
• Victor Moroz, Synopsys, USA: Material Engineering for Advanced CMOS Technology
• Michael Nolan, Tyndall National Institute, Ireland: Modelling of Interfaces and Surface reactions
• Daniele Pagano, STMicroelectronics, Italy: Virtualization of processes, metrology and maintenance for advanced SiC-based device manufacturing
• Ionut Radu, Soitec, France: New Substrate Materials for Advanced Electronic Devices
• Kentarou Sawano, Tokyo City University, Japan: Strain engineering of Si/Ge heterostructures based on Ge virtual substrates
• Werner Schustereder, Infineon Technologies Austria AG, Austria: Advanced Processes for Power Devices
• Shashank Sharma, Applied Materials, USA: Novel Processes for Advanced Nanoelectronics Devices
• André Vantomme, KU Leuven, Belgium: Tuning nickel silicide properties via ion implantation: the role of defects and impurities

Scientific Committee (partial list):

• Giuseppe Arena, STMicroelectronics Catania (Italy)
• Matthias Bauer, Mattson Technology (USA)
• Medhi Bazizi, Applied Materials (USA)
• Ray Duffy, Tyndall Research Institue Cork (Ireland)
• Jonathan England, University of Surrey, Guildford (UK)
• Anne Hemeryck, CNRS-LAAS Toulouse (France)
• Yu-Long Jiang, Fudan University Shanghai (China)
• Paweł Piotr Michałowski, Ł-IMIF Warsaw (Poland)
• Enrico Napolitani, University of Padova (Italy)
• Benoit Sklenard, CEA-LETI Grenoble (France)
• Dimitris Tsoukalas, NTUA Athens (Greece)
• Marilena Vivona, CNR-IMM Catania (Italy)

Publication:

Manuscripts submitted to this symposium will be published in a special issue of Materials Science in Semiconductor Processing.