Silicon carbide and related materials for energy saving applications

Resume : In the last decade, significant progress in the quality improvement of silicon carbide (SiC) single crystals has made the fabrication of high performance SiC power devices a reality. 100 and 150 mm diameter 4H-SiC epitaxial wafers with a low dislocation density have already been brought to market, and using these wafers, high performance SiC power devices are fabricated. However, widespread commercialization of the devices is still hindered by technological issues related to SiC crystal growth, and thus it is abundantly clear that further successful development of SiC semiconductor technology relies on achieving an understanding of SiC crystal growth process and, based on it, improving the technology of manufacturing large high-quality SiC crystals. In this presentation, I will talk about a relevant issue in high-quality 4H-SiC crystals, i.e., the defect formation during physical vapor transport (PVT) growth, particularly focusing on the dislocation formation. X-ray topography and Raman microscopy were employed to investigate the dislocation formation at the initial stage of PVT growth and the nucleation and multiplication of basal plane dislocations during PVT growth. The latter is currently a topic of the most serious concern since it is deeply related to the reliability issues of SiC power devices. It was found that dislocations observed in PVT-grown 4H-SiC crystals exhibited several characteristic features in their types and distribution. Based on these results, I will discuss the formation mechanism of dislocations during PVT growth of 4H-SiC crystals.

Resume : During the PVT Growth of 4H-SiC, the mass distribution in the source material changes as it is consumed. From in-situ CT measurements we find that two areas of different mass and morphology are formed. With this work we want to show the influence of the changing powder on the growth kinetics of the SiC crystal. The SiC vapor species are sublimed in the hottest areas first, leaving behind a skeleton of porous graphite. Due to vapor transport and the resublimation in the colder parts of the source material, a morphological change of the SiC powder to a needle like structure takes place. The initially round powder particles are converted into columnar structures comprising cylindrical pores aligned in the direction of mass flow. Due to the alignment of the cylindrical pores the effective heat conductivity of the source material will change into a directional property. In this work we want to extract the morphological and geometrical changes we can find in the in-situ CT at different stages of crystal growth and take it into account for the modeling of the temperature field. In this way, the alteration of growth parameters caused by changes in the source material will be evaluated. In particular we are interested to which extend the growth interface of the growing crystal is affected by a changing temperature profile or by mass transport phenomena.

Resume : During PVT-growth, thermal stresses caused by differing thermal expansion coefficients of the growth setup and the growing crystal occur, introducing defects in the crystal. These stresses can be reduced by varying the duration of the cooling phase of the growth run. For this paper, two 100 mm 4H-SiC crystals with long (80 h) and short (40 h) cooling steps were grown. Wafers near the seed and close to the growth interface of the crystals are cut and etched with molten KOH to look at the occurrence of basal plane dislocations (BPDs). Defect densities of BDPs are taken from the center and the edge of the wafers. Alignment of Defects in the <1-100> and <11-20> are also investigated. Since BPDs lie perpendicular to the growth direction, these defects are not caused by defects inherited from the seed and can be used as an indicator for thermomechanical stress emerging during the cooling phase. A simulation model is implemented describing the thermomechanical stresses in the crystal and the growth setup during the cooling step. The experimental results are compared using the simulation model with the main focus on the stress values found in the center and on the edge of the crystal. A correlation is demonstrated between simulated stress values and defect densities of BPDs and the influence of a longer cooling step on the crystal quality is shown. The findings can be used to improve the geometry of the growth setup and subsequently decrease thermal stress.

Resume : We have recently demonstrated that the high temperature hydrogen annealing of thin Carbon coatings deposited/implanted on (100) Silicon substrate by Plasma Immersion Ion Implantation (PIII) technique resulted in formation of 3C-SiC film. The thickness of the 3C-SiC film could be controlled by adjusting the annealing temperature and/or duration. Furthermore, for C coatings obtained in deposition mode (negligible impact energy), the 3C-SiC film was oriented with respect to substrate and could be used successfully as seed for further 3C-SiC epitaxial growth. In the present contribution we will present the extension of this study to other Si orientations and we will also report on the role of thickness of initial Carbon coating. For this purpose, the 5nm, 10nm and 40nm thick Carbon coatings were deposited by PIII on the top of (100), (110), (111) and (112) oriented Si substrates. The wafers were diced and submitted to annealing in CVD reactor under H2 flow at temperatures ranging from 1250°C to 1400°C. The formation of 3C-SiC after thermal treatment was detected and quantified using Fourier-transform infra-red (FTIR) spectroscopy. Scanning electron microscopy (SEM) and optical microscopy (OM) were used to control the surface evolution and quantify the voids formation at 3C-SiC/Si interface. This work has been supported by the European project CHALLENGE (Call: H2020-NMBP-2016-2017, grant. agreement 720827).

Resume : 3C-SiC devices are hampered by the defect density in hetero-epitaxial films. Acting on the substrate, it is possible to achieve a better compliance between Si and 3C-SiC. We present here an approach to favorite defect geometrical reduction in both [ ] and [ ] directions by creating Inverted Pyramids on Si (IPS). A study of 3C-SiC growth on IPS is reported showing benefits in the film quality and a reduction in the linear density of stacking faults. The particularity of 3C-SiC growth process on ISP substrate is that film grows occurs simultaneously on (111) (inside the pyramids) surfaces and (100) surfaces (ridges between adjacent pyramids). The optimized carbonization step has to give satisfactory results on both surface orientations. From the experiment it has been observed that the carbonization generally used for (111) silicon substrate gives better results. Furthermore the growth process on (100) surface shows a larger growth rate with respect to the growth on the (111) surface and this effect produce some voids inside the material. The main problem of the process is that from the (100) ridges between the pyramids, several Anti Phase Boundary (APB) are originated and these defects generate also several stacking faults (SFs). To reduce these last defects both a reduction of the (100) ridges or the use of an off-axis substrate has been tested and the results will be presented at the conference.

Resume : The cubic polytype of SiC shows technological challenges for the bulk-growth such as a high supersaturation, a silicon rich gas phase and a high vertical temperature gradient. We have developed a transfer method for high quality 3C-SiC-on-Si seeding layers (grown by CVD) on top of a SiC carrier, creating a seeding stack suitable for the use in sublimation epitaxy. The main challenge for this transfer is the creation of a large area free-standing 3C-SiC epi-layer. By optimizing the transfer using a ND:YvO4 laser with a wavelength of 1064nm for cutting and a suitable removal for the silicon (HF:HNO3:H2O) we increased the dimensions of our seeding area up to 52x52 mm2 yielding two inch seeds for the subsequent vapor phase growth. Growth on such seeding stacks was conducted showing a reproducible process for the manufacturing of 3C-SiC material up to two inch with thicknesses from 0.5mm up to 0.87mm. In additional experiments first attempts for four inch growth was conducted. The samples were characterized using optical microscopy, Raman and XRD. Occurring defects are protrusions, carbon inclusions and stacking faults. Even though the protrusion defect states a big problem with increasing thickness, bulk-like samples grown with this method show no stress in the XRD characteristics. Analysis of surface defects state a coherence between growth velocities of different surface orientations.

Resume : In order to growth 3C-SiC bulk material of 4 and 6 inches a new epitaxial reactor chamber has been designed and tested. The main idea is to grow a thick hetero-epitaxial layer on silicon, melt the silicon substrate and continue the growth at high temperature. In this way it will be possible to grow a bulk substrate of 3C-SiC with a low density of SFs and low wafer bow. In fact, the bow can be strongly decreased by removing silicon one of the main components of the stress due to the different thermal expansion coefficient between the two materials is completely eliminated. The removal of silicon gives also the possibility of a large increase in the growth temperature and in the growth rate, and then thicker wafers and better material can be grown. A large set of experiments have been performed to understand how to melt the silicon substrate, how to etch the residual silicon and how to grow the homo-epitaxial layer on the 3C-SiC substrate obtained after the silicon melting. In this work, we will describe the experiments on the melting and etching process and the experiments to optimize the homo-epitaxial growth at high temperature. We have observed that both the growth temperature and the growth rate have a great impact on the defects density (SFs, point defects, …) while the doping has a large effect on the internal stress of the material. The optimization and the complete characterization of the process in terms of defects density will be presented to the conference.

Resume : 3C-SiC is as a wide band semiconductor offering very attractive properties for power electron devices. But the difficulties for growing it either under bulk form or thin film make it an overlooked material compared to III-Nitrides or hexagonal SiC polytypes. 3C-SiC/Si heterostructures face the issue of a low crystalline quality, with no way, to date, for electrically isolating it from the Si substrate. The use of AlN/Si templates could be a very promising way to overcome both previous issues according to a very low lattice mismatch between AlN and SiC. Furthermore, the very high energy band gap of AlN (6.02eV) prevents, theoretically, any electrical leakage towards the Si substrate. In this presentation, we explore the specific trends of 3C-SiC growth on AlN/Si thin films. We also consider AlN grown on sapphire in order to assess AlN film with different strain state than AlN/Si templates. 3C-SiC growth has been achieved under CVD using silane (SiH4) and propane (C3H8) as precursors at temperatures between 1200 and 1350° under H2 and N2. Single crystalline 3C-SiC thin films have been obtained for both cases with characteristics according to the nature of the substrate. We show a gain in crystalline quality of the 3C-SiC grown on AlN/Si compared to a direct growth on Si. In particular, we focus on the structural evolution of the AlN/Si templates induced by the high temperature regrowth process. The evolution of electrical properties of the grown films has been studied also.

Resume : Recent breakthroughs in material quality have led to a “rediscovery” of Ga2O3 such as a high band gap transparent conductor, transparent field-effect transistors, photodetectors but also as a platform for power electronic devices.1-3 Our work is dedicated to Ga2O3 , in the most stable beta-phase. Physical properties of nominally undoped -Ga2O3 thin-films grown on c and r-sapphire substrates by pulsed laser deposition (PLD) and MOCVD will be discussed. An unexpectedly low resistivity of (×10-2cm) for n type Ga2O3/r-Al2O3 (by PLD) was found to be resistant to high dose proton irradiation and largely invariant (metallic) over temperatures from 2 to 850K. Energy dispersive X-ray fluorescence spectroscopy, secondary ion mass spectroscopy, Rutherford backscattering spectrometry, X-ray photoemission spectroscopy and electron paramagnetic resonance did not reveal the presence of significant shallow donor concentrations (defects or impurities). It was postulated, therefore, that the degenerate (confirmed by ultraviolet photoelectron spectroscopy) electrical transport could be the result of a two-dimensional like metallic surface.4 Attaining p-type doping in gallium oxide may already be an important step for technological integration.We showed the first time an evidence of high temperature p-type conduction in the undoped -Ga2O3 grown by PLD and MOCVD. Hole conduction, established by Hall and Seebeck measurements,is consistent with findings from photoemission and cathodoluminescence spectroscopies. The ionization energy of the acceptor level was estimated to be 1.2eV above the valence band edge.5 1. S.C. Dixon, et al , J. Mater. Chem. C, 2016, 4, 6946 2. J.A. Caraveo-Frescaset al ACS Nano, 7, 5160 (2013) 3. M. Higashiwaki, et al, Appl. Phys. Lett. 100, 013504 (2012) 4.E. Chikoidze et al, Materials Today Physics 8 10e17, (2019) 5. E. Chikoidze et al, Mater. Today Phys. 3, 118 (2017)

Resume : Today, the introduction of wide band gap semiconductors in power electronics has become mandatory to improve the energy efficiency of devices and modules and to reduce the overall electric power consumption. Due to its excellent properties, gallium nitride (GaN) and related alloys (e.g., AlxGa1-xN) are promising materials for the next generation of high-power and high-frequency devices [1]. However, there are still several technological concerns hindering the complete exploitation of these materials [2-4]. As an example, high electron mobility transistors (HEMTs) based on AlGaN/GaN heterostructures are inherently normally-on devices, while normally-off operation is required in many power electronics applications. This paper will give an overview on some scientific and technological aspects related to normally-off GaN HEMTs technology. In particular, a special focus will be put on the p-GaN gate [5-6] and on the recessed gate hybrid MISHEMT [7-9]. The role of the metal on the p-GaN gate and of the insulator in the recessed MISHEMT region will be discussed. Moreover, some novel approaches for normally-off GaN transistors will be also mentioned, giving also a short look to the status of vertical GaN devices. [1] F. Roccaforte, P. Fiorenza, R. Lo Nigro, F. Giannazzo, G. Greco, Riv. Nuovo Cimento 41 (2018) 625-681 (DOI: 10.1393/ncr/i2018-10154-x) [2] F. Roccaforte, P. Fiorenza , G. Greco, R. Lo Nigro, F. Giannazzo, A. Patti, M. Saggio, Physica Status Solidi a 211, (2014) 2063-2071. [3] F. Roccaforte, P. Fiorenza, G. Greco, M. Vivona, R. Lo Nigro, F. Giannazzo, A. Patti, M. Saggio, Appl. Surf. Sci. 301 (2014), 9-18. [4] F. Roccaforte, P. Fiorenza, G. Greco, R. Lo Nigro, F. Giannazzo, F. Iucolano, M. Saggio, Microelectronic Engineering 187-188, (2018) 66-77. [5] G. Greco, F. Iucolano, S. Di Franco, C. Bongiorno, A. Patti, F. Roccaforte, IEEE Transaction on Electron Devices 63, (2016) 2735-2741. [6] G. Greco, F. Iucolano, F. Roccaforte, Materials Science in Semiconductor Processing 78, (2018) 96-106. [7] P. Fiorenza, G. Greco, F. Iucolano, A. Patti, F. Roccaforte, IEEE Transaction on Electron Devices 64, (2017), 2893-2899. [8] G. Greco. P. Fiorenza, F. Iucolano, A. Severino, F. Giannazzo, F. Roccaforte, ACS Appl. Mater. Interfaces 9, (2017) 35383–35390. [9] P. Fiorenza, G. Greco, E. Schilirò, F. Iucolano, R. Lo Nigro, F. Roccaforte, Jpn. J. Appl. Phys. 57, 050307 (2018).

Resume : Research is currently in the focus to bring success in the MOCVD of group III nitrides on epitaxial graphene with applications in, e.g., flexible electronics. Mostly, the MOCVD of GaN on epitaxial graphene has been reported with emphasis on realizing the concept of van der Waals epitaxy of sp3-bonded 3D films on 2D materials. Here, we employ several characterization techniques, including Raman spectroscopy, atomic force microscopy, and transmission electron microscopy, to reveal diverse and very distinct morphology and structure of AlN films on epitaxial graphene; to understand the growth mechanisms behind; and to accentuate the occurrence of a surface phenomenon of enhanced Raman scattering of graphene in the case of nanostructured AlN films. The nanostructured AlN films developed through the implementation of low deposition temperature of 700oC, while deposition temperatures of up to 1410oC have been implemented to reproduce the typical MOCVD conditions established for the growth of AlN films of high crystal quality on SiC. Low stability of the epitaxial graphene in the MOCVD environment under high temperature conditions (> 1240oC) has been indicated by the present TEM study, yet AlN crystallites grew on the SiC with epitaxial orientation. Few layers of graphene on top of the SiC have been resolved in the overall heteroepitaxial structures obtained at the lower temperatures. Support for this work through FLAG-ERA JTC 2015 project GRIFONE is acknowledged.

Resume : Epitaxial graphene (EG) on silicon carbide (SiC) is an excellent channel material for high frequency transistors. Atomic layer deposition (ALD) is the method of choice to obtain uniform and conformal gate insulating films on graphene. Typically, nucleation of ALD layers is promoted by the direct functionalization of graphene surface or pre-deposition of a seed-layer, which, in turns, adversely affect the graphene electrical properties or give rise to insulating films with increased equivalent oxide thickness and interface trapping. In this work, uniform and conformal Al2O3 films were obtained by seed-layer-free thermal ALD at 250 °C on highly homogeneous monolayer (1L) epitaxial graphene (EG) (>98% 1L coverage) grown under optimized high temperature conditions on on-axis 4H-SiC(0001). The enhanced nucleation behavior on 1L graphene is not related to the SiC substrate, but it is peculiar of the EG/SiC interface. Ab-initio DFT calculations showed an enhanced adsorption energy for water molecules on highly n-type doped monolayer graphene, indicating the high doping of EG induced by the underlying buffer layer as the origin of the excellent Al2O3 nucleation. Nanoscale resolution current mapping by conductive atomic force microscopy (C-AFM) showed highly uniform insulating properties of the Al2O3 thin films on 1L EG, with a breakdown field >8 MV/cm. These results will have important impact in epitaxial graphene device technology. This work has been supported by the FlagERA GraNitE project (MIUR grant no. 0001411) and by the CNR/HAS bilateral project GHOST.

Resume : The technology breakthrough in high-efficiency blue nitride based LEDs has enabled the rapid market penetration of energy-saving LED white light sources. In this presentation, silicon carbide (SiC) has been explored to emit yellow light and blue light as a new wavelength conversion material for a new type of white LED light source taking advantages of abundancy and good thermal conductivity of SiC. Strong yellow emission from boron and nitrogen co-doped SiC has been demonstrated at room temperature. Blue emission has been investigated from both aluminum and nitrogen co-doping of SiC and porous SiC. Strong blue emission from Al-N co-doped SiC has only been observed at low temperature, while strong blue emission from porous SiC has been achieved at room temperature after optimization of pores formation conditions and surface passivation. White light with color rendering index as high as 81 has been achieved from B-N co-doped SiC with a porous surface under optical pump. A prototype of hybridly integrated warm white is achieved by adhesive bonding of a blue LED on SiC substrate with B-N co-doped fluorescent SiC. At last, a monolithically integrated warm white light source through directly growing near ultraviolet LED on fluorescent SiC by metalorganic vapor chemical vapor deposition is demonstrated. Our original results cover growth of fluorescent SiC, formation of porous SiC, optical characterization of these materials with regard to photoluminescence, low temperature photoluminescence, time resolved photoluminescence and thermally stimulated luminescence, material emission mechanism analysis, carrier dynamics analysis, warm white light source fabrication and characterization. Basing on these results, perspectives are shared.

Resume : Heterogeneous photocatalysts offer great potential for a variety of applications by converting photon energy into chemical energy. However, finding the best material to catalyze photochemical reactions is strenuous owing to numerous factors that should be examined. Both, the electro-optical and photocatalytic behaviors rely on the exciton generation, therefore, photocatalytic properties can influence the electronic and optical properties of systems in real environments, where the contact between a semiconductor and an electrolyte can lead to catalyzed reactions. From the study of the photocatalytic properties, we found that size distribution has an enormous effect on the photocatalytic activity, in other words, on the electrolyte ? surface interaction in SiC. SiC clusters in size range of 1-4 nm show no photocatalytic effect while particles larger than the exciton Bohr radius of SiC can decompose methylene blue in a spectacular way. When we added molecular sized SiC NPs to larger SiC particles or ZnS particles, photocatalytic efficiency was more than two times higher than that of the photocatalyst alone. This result demonstrates that molecular sized semiconductor materials can boost the photocatalytic efficiency of materials by enhancing the exciton generation and separation efficiency. For differently sized SiC particles, a type-I homojunction is formed built up from materials with the same chemical composition in a colloid solution of uniformly charged particles.

Resume : As ?smart? systems become more complex, driven by the need to add more functions within a given size, the requirement for novel 3D-integration techniques becomes more focused towards achieving a reduction in power consumption and an enhancement in energy efficiency of the integrated devices. Integrating dissimilar materials with a large lattice mismatch and different material thermal expansion coefficients (i.e., between Si and SiC) limits the deposition or growth techniques in order to avoid a large density of defects at the material interface that significantly degrade the performance of the integrated devices. Also, the growth temperature and/or post-growth anneal steps are non-CMOS compatible, making direct SiC integration with Si devices and circuitry extremely challenging. This study addresses the pressing need for wafer-level heterogeneous integration of SiC on Si with back-end-of-line compatible low-temperature processes (< 300 °C) leading to strain-free and defect-free integrated devices. To explore this technology, electrical properties of the bonded SiC/Si interface are investigated, with particular interest in the role of the interfacial layer in the carrier transport mechanism. N-SiC/P-Si and N-i-SiC/P-Si bonded pairs as fundamental electronic and optoelectronic test devices are fabricated and characterised electrically and optically, resulting in a current transport mechanism being proposed based on comparative modelling. We show that this technology allows both efficient vertical electrical and heat conductivity through the bonded interface in addition to a high optical transmittance without the need to sacrifice one for the other leading to reduced energy consumption and greater device/circuit efficiency. * Science Foundation Ireland is acknowledged for funding this project through grants 17/TIDA/5127 and 12/RC/2278.

Resume : Ion-implantation is widely used for selective n-type or p-type doping in power devices based on silicon carbide (4H-SiC). Typically, high temperature post-implantation annealing is required to electrically activate the implanted species, i.e., Phosphorous (P) for n-type or Al (Alluminium) for p-type doping. In this work, P and Al ions have been implanted at different energies and fluences to create 200nm thick box-profiles with a concentration of 10^20 at/cm3. The implanted layers have been subjected to activation annealing processes at high temperatures (1675-1825 °C). Upon annealing, only a moderate increase of the surface roughness was detected by AFM. Van der Paw measurements indicated a decrease of the resistivity of both n-type (from 4.3 mOhm.cm to 3.3 mOhm.cm) and p-type (from 0.36 to 0.22 Ohm.cm) layers with increasing the annealing temperature. Room temperature Hall measurements allowed to determine hole concentration in the range 0.65-1.34x10^18/cm^3 and mobility values in the order of 21-27 cm^2/(Vs). Scanning capacitance microscopy (SCM) measurements was employed to determine the depth distribution of electrically active dopants in the n-type implanted layers. On the other hand, the fraction of active dopant in p-type implanted layers, estimated by temperature dependent Hall measurements, ranged between 39% and 56%. The possible implications of these results in the fabrication of 4H-SiC power devices have been discussed.

Resume : Development of energy saving materials and systems with enhanced performance, like smart materials, liquid phase sensors and charge storage devices requires non-traditional concepts of materials design. Integration of epitaxial graphene with SiC can bridge the excellent intrinsic properties of the semiconductor and semimetal, enabling the above-mentioned applications. Furthermore, interfacing this combined system with different metals, e.g. alkali and heavy metals, may allow tunability of electronic and optical properties. Here, we explore the behaviour of selected metals (Li, Ag and Pb) on epitaxial graphene obtained by thermal decomposition of Si-face 4H SiC (0001). We show that the observed effects, related to Ag and Pb, are excellent prerequisites of optical and electrochemical sensing, while lithiation is promising for charge storage. The interaction of metals with graphene was revealed by in depth analysis of Raman spectra, C-AFM and TEM supported by DFT modelling. Significant enhancement of G mode intensity after 15 nm Ag deposition was found due to plasmonic phenomena. Due to its extraordinary chemical and thermal stability, large active surface area and wide potential window, graphene-covered Si-terminated 4H-SiC has an enormous potential to be used effectively as an electrode. Electrochemical performance of the graphene electrode with Pb and Li was studied in detail by using anodic stripping and cyclic voltammetry, and chronoamperometry.

Resume : Cubic silicon carbide (3C-SiC) is an emerging material for high current and energy saving devices. The development of this technology is hindered by a high amount of defects that came from the hetero-interface. The difference in expansion coefficient together with the difference in the lattice parameter are responsible for the formation of extended defects as stacking faults micro-twins and grain boundaries that propagate in the epilayer and reduce the quality of the material. The development of high quality 3C-SiC layer is still representing a scientific and technological challenge. In the present lecture, we used a Si1-x Gex buffer layer between epitaxial SiC and Si substrate in order to reduce the defectiveness and improve the overall quality of the epi-film. In particular, we found that the quality of the film depends on the concentration of the segregated Ge at Si1-xGex/SiC interface. Furthermore, in order to avoid segregation, a Si capping layer was introduced between SiGe and SiC. The introduction of the cap layer needs to modify the growth parameter and a new growth procedures was explored. Connection between segregation, thickness of the silicon capping layer and growth parameter are discussed.

Resume : After extensive research focus in the last two decades, Silicon Carbide devices and SiC Schottky diodes in particular have become widely commercially available. Despite their proliferation in the field of power electronics, the potential for these devices to operate at very high temperatures, in applications such as industrial drilling and process control or space exploration has yet to be practically exploited. In the case of SiC Schottky diodes, this is partially because of the unstable electrical behavior of the ubiquitously inhomogeneous Schottky contact. This paper investigates the performance impact of Schottky diode non-uniformity in the context of high temperature monitoring industrial applications. Batches of Ni/4H-SiC diodes are fabricated, measured up to 450°C and parameterized using different characterization techniques. Microphysical investigations are carried out in order to assess metal-semiconductor interface quality. The stability of electrical characteristics is also evaluated. Inhomogeneity models are employed in order to accurately describe device behavior over large temperature intervals. Ultimately, conditions for obtaining good sensitivity and high power efficiency are obtained. Thus bias levels and temperature domains are determined, where the SiC Schottky diodes are optimally suitable for high-temperature monitoring. Best performing devices are tested as temperature sensors in a practical industrial application.

Resume : Today the Physical Vapor Transport process is regularly applied for the growth of bulk SiC crystals. Due to the required high temperature up to 2400 °C and low gas pressure of several mbar inside the crucible, the systems are encapsulated by several layers for heating, cooling and isolation inhibiting the operator from observing the growth. Also the crucible itself is fully encapsulated to avoid impurities from being inserted into the crystal or disturbing the temperature field distribution. Thus once the crucible has been set-up with SiC powder and the seed crystal the visible access to the progress of growth is limited. In the past X-ray radiography has allowed to overcome this limitation by placing the crucible in between an X-ray source and a radiographic film. Recently these two-dimensional attenuation signals have been extended to three-dimensional density distribution by the technique of Computed Tomography. Beside the classic X-ray attenuation signal dominated by Photoelectric Effect, Compton Effect and Rayleigh scattering the X-ray diffraction resulting at the crystalline structure of the 4H-SiC superimpose the reconstructed result. In this contribution the achievable material contrast related to the level of X-ray energy and the absorption effects is analyzed using different CT systems with energies from 125 kV to 9 MeV. Furthermore the X-ray diffraction influence is shown by the comparison between the advanced helical CT method and the classical 3D-CT.

Resume : Forward voltage instability has been a major issue in developing high-voltage bipolar devices in SiC. This instability is caused by the expansion of stacking faults (SFs) under forward bias conditions. The basal plane dislocations (BPDs) contained in the basal plane propagate from the substrate into the epi-layer are the primary nucleation source of Shockley-type stacking faults. Dislocations in 4H-SiC substrates include threading screw dislocations (TSDs), threading edge dislocations (TEDs), and BPDs. The Dislocations in the substrate can propagate into the epilayer not only retaining the original dislocation structure but also converting it. The study of the dislocation propagation mechanism is one of the main topics about the 4H-SiC research field. For this experiment 4 commercial 4H-SiC substrates coming from the same ingot (sequential ID: 05, 06, 27 and 46) were used to investigate the dislocation density (TSD, TED and BPD) propagation from substrate to the epi-layer and the dislocation propagation within the ingot. The dislocation were highlighted by KOH etching. The etching is performed in molten KOH inside a nickel crucible at a temperature of 500 °C for a period of 5–10 min. Etch pit densities (EPD) are calculated based on the observation under fully automated (X, Y and Z) optical microscopy (nSPEC by Nanotronics). With a powerful software for the image analysis couples with high-resolution microscope, a whole 6 inches wafer map and the dislocations count and classification were obtained. In this study a good correlation between the dislocation evolution (etch pit density and TSD) within the ingot for substrate (from seed to the ingot-end) and the corresponding epi-layer was found. A correlation for the evolution of EPD and TSD from substrate to the epi-layer was also found. All the experiments results will be presented during the conference.

Resume : The last century has seen a dizzying development in the power device electronic field. The innumerable discoveries in material science have been the propellant that drove the most of innovations which pivot on the physics of semiconductors. Beyond the remarkable discoveries there was always a period where the raw materials have been refined, improved in terms of crystal quality, electrical performance and tuning of the dedicated processes. Today we are living in the Silicon Carbide refinement period. To take advantage of Silicon Carbide (especially 4H-SiC), high crystal quality is strongly request. Epitaxial layers are usually grown on substrates made in 4H-SiC (homoepitaxy). The control of defect density, thickness and doping concentration and their uniformity play a crucial role to ensure the high yield of devices. Strong relationship between growth parameters as Growth Rate, Cool down Ramp, C/Si ratio, buffer layer, growth temperature and electrical parameters as leakage current, breakdown voltage, in MOSFET devices have been observed. In general, high growth rate epitaxial process (HGR) has been compared with standard process (STD) in terms of defect density on epilayer and device yield. The results show an improvement of robustness and reliability of the devices with HGR epi layer. Several trials of further increase of the growth rate (HHGR) have been conducted successful. Also, the cool down ramp step has been explored to decrease defect density and improve the surface condition. The variation of thermal budget and the longest stay (at temperature > 1600 °C) of the sample inside the chamber resulted in a lower morphological small defects density (diameter < 1 µm). Finally, an evaluation of an improvement of doping activation during the cool down ramp is in progress with reference to improvement of dedicated electrical parameters (Vdson).

Resume : Nanofluids perform a crucial role in the development of newer technologies ideal for industrial purposes. Hexagonal form of boron nitride (h-BN) has versatile properties, such as chemical inertness, electrically insulating and high in-plane thermal conductivity (~600 W/m-K) makes it a good candidate for heat transfer applications. Considering the fact that h-BN nanofluids are a relatively new class of materials, there are limited studies within the literature in terms of characterization of BN nanofluids. This study comprises the synthesis of ethylene glycol-water mixture (i.e., EG/DW= 80/20, 60/40) based h-BN nanofluids and investigating the effect of particle concentration, temperature and base fluid on thermal conductivity. Synthesized h-BN nanofluids have been characterized by transmission electron microscopy (TEM) and Dynamic light scattering (DLS) studies. Well dispersed EG-water mixture based h-BN nanofluids with different volume fractions loadings between 0.5% and 3% were prepared by a typical two-step method. The thermal conductivity of as-prepared nanofluids was investigated using the standard transient hot-wire method (THW) which showed an enhancement of 13.7% and 13.1% for 3 vol.% of 80/20 and 60/40 EG/DW based h-BN nanofluids. Also, the thermal conductivity enhancement of h-BN nanofluids was found to be weakly dependent on temperature in range 30 ̊ C to 60 ̊ C. The viscosity of the BN nanofluids was also studied and showed an increase with increase in particle concentration.

Resume : Epitaxial graphene (EG) on SiC is a material of choice for electronics, sensing and metrology applications. Many peculiar properties of EG are due to the presence of a carbon buffer layer (BL) covalently bonded to the Si face of SiC. Hydrogen intercalation is a widely used method to detach the BL from the substrate, resulting in a change of the electronic properties (mobility, doping) of EG and of the Schottky barrier at EG/SiC interface. The ability to probe the spatial uniformity of the intercalation and its correlation with the local electrical properties of graphene is mandatory to fully exploit this process for future nano-electronics applications. In this work, micro-Raman mapping and conductive atomic force microscopy (C-AFM) have been jointly applied to investigate the structural and electrical homogeneity of quasi-free-standing monolayer graphene (QFMLG), obtained by high temperature decomposition of 4H-SiC(0001) followed by hydrogen intercalation at temperatures from 900 to 1100 °C. Strain and doping maps, obtained by Raman data, were correlated with nanoscale resolution current maps and local I-V analyses performed by C-AFM. The distribution of Schottky barrier height values at QFMLG/SiC interface was evaluated from local I-V curves using the thermionic emission model. High resolution cross-sectional TEM analyses were also performed to get further insight in the structural properties of the interface. Applications of the demonstrated approach to probe the electrical homogeneity of EG subjected to intercalation with other species (such as ammonia) will be also presented. This work has been supported by the FLAG-ERA projects GRIFONE and GraNitE, and by the CNR/HAS bilateral project GHOST.

Resume : The cubic polytype of SiC shows technological challenges for the bulk-growth such as a high supersaturation, a silicon rich gas phase and a high vertical temperature gradient. However, a significant step for electronic devices like MOSFETs and intermediate band solar cells can be predicted for high quality material due to the high electron mobility and the wide bandgap. A big draw-back for the development of such devices is the lack of bulk material for further processing. We have developed a transfer method for high quality 3C-SiC-on-Si (100) seeding layers on top of a SiC carrier, creating a seeding stack suitable for the use in sublimation “sandwich” epitaxy (SE) and conducted a series of growth experiments material of different quality, increasing the thickness of the epi-layer at different growth-rates. Raman analysis of obtained material shows no influence on the quality by different growth rates however increasing thickness will also expand the dimensions of the protrusion defect limiting the defect free surface area. Characterization of the surface morphology at different growth-rates describes a change in the preferred growth direction from [111] to [100] decreasing the defect density. First attempts of real bulk growth increasing the thickness up to 2.9mm features polytype changes along the [111] planes accompanied by protrusions. Furthermore, occurring backside sublimations indicates the need of a more sufficient protection layer.

Resume : Cubic silicon carbide (3C-SiC) is attractive for development of various semiconductor device applications mainly due to higher electron mobility and lower bandgap compared to hexagonal counterparts. The potential of this material has been recognized by the European Commission which is financing a collaborative research project” CHALLENGE” (2017-2021) aiming at pushing 3C-SiC growth and device fabrication technologies closer to the market. Previously we demonstrated that high crystalline quality with few domains can be grown on Si-face on 4 degree off-oriented 4H-SiC substrates. However, the large off-orientation limits sample size to less than 10x10 mm2. Therefore, we have explored growth of 3C-SiC on 2-inch hexagonal SiC substrates. In order to control the initial nucleation of 3C-SiC domains, their lateral enlargement on the surface and formation of double positioning boundaries (DPBs) and stacking faults is critical. We present 2-inch growth of 3C-SiC using substrates with off-orientation varying from 0.8 to 2 degrees, as well as the investigation of DPBs formation and propagation in 3C-SiC grown on different polarities of hexagonal SiC substrates. The crystalline quality of 3C-SiC is dependent on growth conditions. We investigated samples using XRD and LTPL techniques, while more detail analysis of defects, especially stacking faults, was obtained using molten KOH etching of grown and cross-sectional surfaces.

Resume : SiC has been applied to many high technologies because it has good thermal properties such as low thermal expansion coefficient, chemical stability and good thermal shock resistance. SiC microtube has been studied by several researchers. In this study, a SiC microtube was fabricated by forming a SiC layer on a graphite fiber by conversion coating using a carborthermal reaction and then removing carbon. The morphology and mechanical properties of the SiC microtube are shown to vary with the annealing temperature of the SiC coating on the graphite surface. The crystalline, surface and bonding properties were confirmed by XRD, FE-SEM and XPS analysis, respectively.

Resume : Cubic silicon carbide (3C-SiC) is often regarded as a good material for power electronics. However, compared to the mature hexagonal polytype (4H–SiC), 3C-SiC technology still suffers from the influence of the material quality. In this context, metallizations and dielectrics are important building blocks of 3C-SiC power devices (e.g., diodes, MOSFETs), which deserve to be investigated. This work reports on the development and characterization of Ohmic metallizations and gate dielectrics on 3C-SiC layers grown on Si(100) substrates. The Ohmic contact formation was achieved both on n-type and p-type type 3C-SiC, employing annealed Ni and Ti/Al/Ni films. The formation of different phases at the interface and/or in uppermost part of the reacted metal layer (e.g., Ni2Si, Al3Ni2, TiC, ...) was correlated with the changes of the electrical and morphological properties of the contacts. The specific contact resistance was in the range 10-3-10-5 Ω cm2 , depending on the doping level of the 3C-SiC. On the other hand, the electrical properties of thermally grown SiO2 layers were studied by means of I-V and C-V analyses of MOS capacitors. The electrical measurements allowed to estimate values of interface state density in the order of 4-8×1012 cm-2eV-1. A negative shift of the flat band voltage was observed in the MOS capacitors, likely due to the presence of positive charged donor states in the MOS system. Local bias stress tests of the dielectric by conductive atomic force microscopy (C-AFM) allowed to extract a Weibull plot and correlate the oxide properties with the morphology of the 3C-SiC material. This work has been supported by the EU project Challenge (grant agreement n. 720827).

Resume : Influence of oxygen-plasma treatment on in situ SiN/AlGaN/GaN MOS heterostructure FET with SiO2 gate insulator was investigated. Oxygen-plasma treatment was performed onto in situ SiN before SiO2 gate insulator was deposited by plasma enhanced chemical vapor deposition (PECVD). DC I-V characteristics were not changed by oxygen plasma treatment. However, pulsed I-V characteristics were improved showing less dispersion compared to non-treated devices. Capture emission time (CET) maps were extracted from measurements of the threshold voltage drift over stress-recovery sequences. CET maps indicated that the density of traps was reduced by the treatment. X-ray photoemission spectroscopy also revealed that SiO2 on in situ SiN with oxygen-plasma treatment has O/Si ratio much closer to the theoretical value. It suggests that oxygen-plasma treatment modified surface condition of SiN layer favorable to SiO2 formation by PECVD.

Resume : We have studied the influence of different SiC powder size distributions and the sublimation behavior during physical vapor transport growth of SiC in a 75 mm and 100 mm crystal processing configuration. The evolution of the source material as well as of the crystal growth interface was carried out using in‐site 3D X‐ray computed tomography (75 mm crystals) and in-situ 2D X-ray visualization (100 mm crystals). Beside the SiC powder size distribution, the source materials differed in the maximum packaging density and thermal properties. In this latter case of the highest packaging density the in‐itu X‐ray studies revealed an improved growth interface stability that enabled a much longer crystal growth process. During process time, the sublimation‐recrystallization behavior showed a much smoother morphology change and slower materials consumption as well as much more stable shape of the growth interface than in the cases of the less dense SiC source. By adapting the size distribution of the SiC source material we achieved to significantly enhance stable growth conditions.