Integration, metrology and technology CAD co-development for sub-10nm technology nodes

Resume : Gate-all-around (GAA) nanowire (NW) MOSFETs have been considered to be one of the most promising candidates for next-generation CMOS devices beyond FinFETs due to their superior electrostatic channel control at sub-10nm technology nodes. Recently, GAA NW MOSFETs with vertically stacked multiple NWs have been demonstrated to maximize the drive current per footprint. However, the gate intrinsic capacitance increases as the number of stacked NWs increases, resulting in the aggravation of the intrinsic device gate delay. Hence, we investigated the transient characteristics of inverter circuits depending on the number of their stacked NWs using a device simulator (Sentaurus TCAD, L_2016.03). In this study, the propagation delay times of inverter circuits with single-/double-/triple-NWs for both n-MOS and p-MOS based on 3-D structure have been simulated. The inverters include the additional load capacitance at the output node for transient analysis. In our study, an inverter circuit with triple-NWs exhibits the shorter delay time by 46%, compared to an inverter circuit with a single-NW. The reason for this is that the delay time is dominated by the drive current since the gate intrinsic capacitance becomes negligible. The added load capacitance is ~100 times larger than the gate intrinsic capacitance. This results show an alternative to improve the timing behavior of inverters while maintaining the maximum drive current in multiple stacked NWs by adding the optimal load capacitance.

Resume : Density functional theory (DFT) has been used to determine properties of point defects in crystalline Si, SiGe, and Ge, including formation energies, diffusivities, charge states, and the pressure dependence of parameters. Entropies and diffusivity pre-factors have been determined from phonon spectra. For the calculations, we used ATK (Atomistix ToolKit) with a generalized gradient approximation (GGA) functional and VASP (Vienna Ab initio simulation package) with GGA and hybrid functional. The setup and execution of DFT simulations and the data extraction from DFT output have been performed within the framework of Synopsys’ ATP (Ab-initio to process) tool. In SiGe, defect properties are studied depending on the Ge mole fraction and the local configuration of neighboring atoms. The spread of properties has been determined by screening over all sites in 64-atom super cells, running automatized simulations. The effective diffusivity of vacancies in SiGe has been calculated by modeling vacancy random walks through SiGe using an atomistic kinetic monte carlo algorithm. TCAD parameters have been generated from DFT results and are compared to parameters inside the process simulator Sentaurus Process. Quantities known from experimental literature are used to benchmark the accuracy of DFT simulations. A good agreement with benchmark parameters has been achieved with hybrid DFT calculations.

Resume : Recently GeSn has emerged as a novel material suitable for certain transistor and optoelectronic applications, however optimising the Sn incorporation is a challenging task. It is known that GeSn can be changed from an indirect to direct semiconductor as the Sn substitutionality approaches 10 %. Furthermore knowing the ideal Sn % needs to be determined, depending on each specific application. Continuum-based modelling of materials and devices can provide timely input in order to steer the definition of experimental work. The ability to understand and predict underlying physics, in order to overcome the technological limitations, can provide a substantial time and cost saving. In this work, firstly the GeSn band gap obtained using Empirical Pseudo-potential method (EPM) using Synopsys SBAND will be discussed as a function of Sn %. Subsequently, using Sentaurus Device, the focus will be redirected towards the simulation of n- and p-junctionless nanowire (JNT) devices, where homogeneously doped GnSn nanowire is modelled with a gate wrapped around the channel. Performance of the JNTs will be evaluated in terms of Ion/Ioff ratio and subthreshold slope, varying the geometry and the doping level. The trends for this JNT architecture highlight the strong variation of the performance with increased Sn %, namely Ion/Ioff and subthreshold slope degrade rapidly, which can be counteracted by decreasing the nanowire diameter.

Resume : The interaction between electrons and phonons is an important scattering process affecting carrier transport in bulk materials and devices. Nowadays, the effects of electron-phonon coupling can be rigorously included in atomistic TCAD simulations, using established electronic structure methods such as density functional theory (DFT) or tight-binding, coupled to either the Boltzmann transport equation (BTE) [1] in the case of bulk materials, or to Non-equilibrium Green’s function (NEGF) theory [2,3,4] in the case of devices. However, the evaluation of the electron-phonon coupling (EPC) matrix remains computationally challenging, and practical applications are mostly restricted to simplified systems, despite the efforts in making the computation of the EPCs feasible [3,5,6]. In this contribution, two alternative methods will be discussed, which allow for efficient atomistic TCAD simulations of complex devices including electron-phonon coupling effects without the explicit evaluation of the EPC matrix. These methods have been implemented in the Atomistix ToolKit software [7] developed at QuantumWise A/S. In the MD-Landauer method, NEGF theory and the Landauer approach are combined with a statistical averaging over finite-temperature molecular dynamics (MD) [8] trajectories to calculate phonon-limited mobilities at the atomistic level [9]. The approach is validated by comparing to temperature-dependent mobilities and conductivities obtained using the BTE for different bulk and one-dimensional systems, and by comparing successfully against experimental values for bulk silicon and gold. In the STD-Landauer method, a canonical average over the phonon modes of the system [10] replaces MD to create, using a special thermal displacement (STD), a distorted configuration effectively describing the effect of finite temperatures on the atomic lattice [11]. The STD-Landauer method is validated against the MD-Landauer calculations and it is shown to provide similar results but at a computational time which is one order of magnitude lower. The method is further used to calculate effect of phonons on the off-current of a silicon n-i-n device and on the photocurrent in a silicon p-i-n junctions, as well as the temperature dependence of the specific resistivity of a Cu twin grain-boundary [12]. [1] T. Gunst, T. Markussen, K. Stokbro and M. Brandbyge, Phys. Rev. B 93, 035414 (2016) [2] M. Brandbyge, J.-L. Mozos, P. Ordejon, J. Taylor, and K. Stokbro, Phys. Rev. B 65, 165401 (2002) [3] M. Luisier, G. Klimeck, Phys. Rev. B 80, 155430 (2009) [4] K. Stokbro, D. E. Pedersen, S. Smidstrup, A. Blom, M. Ipsen, and K. Kaasbjerg, Phys. Rev B 82 075420 (2010) [5] T. Gunst, T. Markussen, K. Stokbro, and M. Brandbyge, Phys. Rev. B 93, 245415 (2016) [6] T. Frederiksen, M. Paulsson, M. Brandbyge, and A.-P. Jauho, Phys. Rev. B 75, 205413 (2007) [7] Atomisitx ToolKit, development version 2017, QuantumWise A/S www.quantumwise.com [8] J. Schneider, J. Hamaekers, S. Smidstrup, J. Bulin, R. Thesen, A. Blom, and K.Stokbro arXiv:1701.02495 [9] T. Markussen, M. Paalsgard, D. Stradi, T. Gunst, M. Brandbyge, and K. Stokbro arXiv:1701.02883 [10] M. Zacharias and F. Giustino, Phys. Rev. B 94, 075125 (2016) [11] T. Gunst, T. Markussen, M. Brandbyge, K. Stokbro in preparation [12] L. Lu, Y. Shen, S. Chen, L. Qian, K. Lu Science 304, 422 (2004)

Resume : Si nanocrystals with sharp size distributions and mean sizes of 2?5 nm in diameter are used as a model system to study P- and B-doping at the bottom end of the nanoscale. By means of atom probe tomography (APT), we demonstrate that P-atoms are quite efficiently incorporated in Si nanocrystals [1], while B-atoms are less efficiently incorporated [2]. Using photoluminescence (PL) and current-voltage (I-V) measurements it is shown that no free carriers are present in doped Si nanocrystals. We explain and prove this observation by the significantly increased substitutional formation energy and dopant ionization energy compared to dopants in bulk-Si [1,2]. Consequently, only a few dopant atoms reside on Si-lattice sites and due to confinement effects, the thermal energy at room temperature is not sufficient for dopant ionization. The vast majority of incorporated dopant atoms are located on interstitial lattice sites, where they form defects states in the energy gap of the Si nanocrystals [1,2]. In conclusion, conventional impurity doping of Si fails if dimensions of < 5 nm are reached. [1] D. Hiller et al., Sci. Rep. 7, 863 (2017) [2] D. Hiller et al., Sci. Rep. (under review)

Resume : Monolayer doping (MLD) has become a topic of interest for the semiconductor industry as conventional doping techniques, such as ion implantation, are on the brink of becoming obsolete as device sizes and pitches continue to scale. Two of the main problems associated with ion implantation are 1) it?s destructive nature which introduces defects that cannot be annealed out of sub 10 nm sized structures and 2) it?s non-conformality which impacts non-planar tightly pitched structures. To this end, alternative doping techniques are being explored, including MLD, which is a diffusion based non-destructive and inherently conformal doping method. Most of the studies carried out for the study of n-type doping, used phosphorus based molecules as the dopant source, as they are commercially available and non-toxic. However, extensive studies, presented here will show that it is difficult to achieve active carrier concentrations greater then 2 x 1019 atoms/cm3. For process integration into the semiconductor industry it will be essential to achieve carrier concentrations of >1 x 10 20 atoms/cm3. A critical assessment of phosphorus MLD will be presented with explanations for this roadblock and potential solutions to this incorporation problem will be discussed. Results on planar and nanowire structures with sub 10 nm dimensions including material and electrical characterisation will be presented.

Resume : Monolayer doping is one of the most recent studied technique for semiconductor doping. Thanks to its surface conformity and controlled dopant gripping, the monolayer doping approach could be suitable for nanostructured surfaces, the new frontier for nano-electronic devices. Furthermore, the usage of this method on Germanium is an important research challenge due to its high mobility properties as a channel material in nano-transistors, and interesting optical properties at high doping. In this paper, we grip to Ge by wet procedures different phosphorous-containing molecules characterized by different chemical affinities. The monolayer is characterized with Nuclear Reaction Analysis to accurately quantify the P atoms/cm2 deposited on Ge surface. After a SiO2 capping procedure, the monolayer is thermally treated with different thermal budgets. We show that conventional thermal processes, such as rapid thermal annealing, does not allow to overcome the surface in-diffusion energy barrier. Such barrier is instead overcome if the surface is melted by pulsed laser thermal annealing technique, as confirmed by the P diffusion profiles detected by Secondary Ion Mass Spectrometry. The control of the physically absorbed P precursor depositions on Ge and other characteristics related to laser annealing will be presented.

Resume : 3 dimensional P type(source)-Intrinsic(gate)-N type (drain) structured FinFET (3D P-I-N FinFET) on silicon on insulator (SOI) has been suggested for low power consumption 1 transistor embedded dynamic random access memory (eDRAM).The intrinsic gate is divided into the partially gated and the ungated channels. It’s DC and AC (memory) characteristics are investigated with the Silvaco ATLAS3D tool. For the technology computer aided design (TCAD) simulation, the bipolar model was employed to account for both electron and hole continuity equations and Selberher impact ionization and standard band to band tunneling were also included. The gate length and the thickness of Fin gate channel on SOI is 10 and 15nm, respectively. The TCAD simulation clearly shows that the 3D P-I-N FinFET sharply switch on at very low turn on voltage, 0.75 V and the on/off current ratio is 3 order of magnitude. Memory operation successfully shows that the memory states regarding writing ‘0’, reading ‘0’, writing ‘1’, and reading ‘1’ strongly depends on the current level by the injected rate through the potential barriers on the drain/source junctions and long retention time for eDRAM.

Resume : Because of the leakage current due to the reduced gate oxide thickness, a gate oxide material with high dielectric constant is required. HfO2 is one of the most promising gate dielectrics, and the HfO2 thickness should be controlled with high precision for the application. Nano-scale HfO2 thin films with nominal thicknesses of 1.2, 2.5 and 5.0 nm were prepared, respectively, on silicon substrates by ALD method and used for thickness measurement of an international round robin test (RRT) using XRR. Aims of the comparison were to measure the thicknesses of nano-scale HfO2 thin films, and to confirm international consistency and equivalence regarding the HfO2 thickness results among participating laboratories. X-ray specular reflectivity curves were measured for the films, and the thicknesses were determined by simulation and fitting procedures. Thickness uncertainties as well as thicknesses of the films were reported from each laboratory. Using the results comparison reference values and standard uncertainties were determined by the uncertainty-weighted mean method. The standard uncertainties for the film thicknesses were 0.003, 0.007 and 0.012 nm, which correspond to the relative uncertainties of 0.85, 0.97 and 0.88% for the specimens, respectively. The thickness results for each specimen from different laboratories were included in each expanded uncertainty width of the corresponding specimen. The facts reveal that HfO2 thicknesses determined by XRR from different laboratories are not only consistent with each other within uncertainty limit, but also extremely accurate. Furthermore, the results show that XRR is an appropriate and accurate measurement method for the thicknesses of nano-scale HfO2 thin films.

Resume : In the last few years, an accelerated trend towards the miniaturization of nanoscale circuits has been recorded. In this context, the Tunneling Field-Effect Transistors (TFETs) are gaining attention because of their good subthreshold characteristics, high scalability and low leakage current. However, they suffer from low values of the on-state current and severe ambipolar transport mechanism. The aim of this work is to investigate the reliability performance of nanoscale TFET device including non-uniform channel doping and oxide engineering aspects. The electrical performance of the considered device is investigated numerically using ATLAS 2-D simulator, where the degradation mechanism and the reliability behavior of the proposed design are analyzed. In this context, the impact of the channel length, traps density and oxide dielectric parameter on the variation of electrical Figures of Merit (FoMs) of the device which are: DIBL, swing factor and ION/IOFF ratio is analyzed. The obtained results indicate the superior immunity of the proposed design against traps induced degradation in comparison to the conventional TFET structures. Therefore, this work can offer more insights regarding the benefit of adopting the Gaussian channel doping and oxide gate engineering for future reliable low-power nanoscale electronic applications.

Resume : In this work, we illustrate how the parasitic resistance of sub-10nm WFIN n- and p-FinFETs devices can be systematically investigated, identifying its different components (local interconnect contacts, epitaxially grown source/drain and extensions), and matched with electrical results (Ron,lin). This is realized combining the utilization of dedicated test-structures to extract the various parasitic resistance components, and of advanced metrology techniques to analyze the morphology of the transistors (shape and dimensions of the various elements). Based on this new method, we are able to nicely predict the positive or negative impact of various processing splits (f.e. fin width, annealing conditions, concentration of in-situ dopant into the epi or presence of extra top-up implant, local interconnect processing conditions, or cleaning steps utilized) on the device performances. We have also been able identify the presence of an additional resistive component affecting the performances of p-FinFETs. We attribute it to an interfacial resistance between SiGe epitaxially grown source-drain and Si extension fin.

Resume : One of the main obstacles towards wide application of Ge in nanoelectronics is the lack of an efficient doping method for the fabrication of heavily doped Ge layers with well controlled junction depth. In fact, n-type doping of Ge is a key bottleneck in the realization of advanced negative-channel metal-oxide-semiconductor (NMOS) devices. Here an overview of different doping techniques will be presented. Special attention will be focused on the use of ion implantation followed by flash-lamp (FLA) annealing for the fabrication of heavily doped Ge. In contrast to conventional annealing procedures, rear-side FLA leads to full recrystallization of Ge and dopant activation independently of pre-treatment. The maximum carrier concentration is well above 10^20 cm-3 for n-type and above 10^21 for p-type doping. The recrystallization mechanism and the dopant distribution during rear-side FLA are discussed in detail. In this work, we report on the strong mid-IR plasmon absorption from heavily P-doped Ge thin films and superconductivity in Ga and Al doped Ge obtained by non-equilibrium thermal processing. The mid-IR plasmon spectral response at room temperature from those samples was characterized by means of Fourier transform infrared spectroscopy. It is proven that the position of the plasmonic resonance frequency signal can be tuned as a function of the P concentration.

Resume : Due to its high carrier mobility, germanium lately attracted a renewed interest in various fields of material science such as nano-electronics, photonics, detectors, etc. However, Ge-based devices often requires very high doping levels ( > 1e20 cm-3), which are above the solubility limit for most of the dopants. Besides, effective downscaling beyond 10 nm needs ultra-shallow junctions, which are challenging especially for donors, due to their high diffusivities. For this purpose, Laser Thermal Annealing (LTA) in the melting regime is the most promising doping technique as it induces ultra-fast liquid phase epitaxial regrowth, while confining the diffusion within the molten layer. Indeed, LTA holds the records of activation for P, As and Sb, being ~ 1e21 cm-3 in the latter case. Latest studies on p- (by means of B or Al) and n-type (using As) doping of Ge by LTA following ion-implantation will be presented thanks to advanced characterizations, in terms of chemical (1D and 3D), electrical and strain pro?ling with nanometer resolution. In particular, fundamental mechanisms such as non-equilibrium diffusion, dopant incorporation, clustering and point defects generation will be discussed with special care on strategies for improving the electrical activation, together with issues about contaminations and thermal stability. These experimental results are relevant for modeling the LTA process in Ge in view of its implementation toward future technologies.

Resume : Laser Thermal Annealing (LTA) at various energy densities was used to recrystallize and activate Ge doped with P by ion implantation. Conventional techniques, such as Secondary Ion Mass Spectrometry, Raman analyses and Transmission Electron Microscopy, were employed to study the dopant diffusion and the structural modification induced during the recrystallization. After LTA at low energy densities, the P distribution was mainly localized in the polycrystalline Ge left as a residual damage induced by the ion implantation. Conversely, a fully activated P diffusion in a perfectly recrystallized material was observed after annealing at higher energy densities. The introduction of a dopant atom in substitutional position often results in generation of strain depending on its configuration within the matrix lattice. Thus, the combination of High Resolution X-Ray Diffraction and Convergent Beam Electron Diffraction techniques allowed to measure an extremely low compressive strain and quantify the strain per each substitutional P atom. In conclusion, these studies render the LTA of widespread interest not only for applications in Ge based technology but also for conducting fundamental studies.

Resume : The fabrication of homogeneously doped germanium layers characterized by high electrical activation is currently a hot topic in many fields, such as microelectronics, photovoltaics, optics and radiation detectors. P spin-on-doping (SOD) technique has been implemented on Ge wafers, by developing an accurate protocol for the spin coating and the curing process of the SOD coating. Many parameters turned out to affect the degree of reticulation reached by the coating, the morphology of Ge surface and the amount of dopant available for diffusion. In detail, the parameters to be controlled are: SOD film thickness, the humidity level in curing atmosphere, curing temperature and time. P diffusion has been carried out through peculiar spike annealing treatments inside a standard tube furnace. The diffusion profiles and dopant electrical properties have been measured through SIMS and Van der Pauw – Hall electrical measurements respectively. Thanks to the optimization of all the involved parameters, continuous and homogeneously doped Ge layers were obtained, without any surface damage. Phosphorus diffusion profiles are box-like, with tunable concentration and thickness and they are totally electrically active up to a maximum carrier concentration of 5x1019 cm-3.

Resume : Small bandgap and high mobility of charge carriers have been recently making germanium (Ge) more and more interesting in several application fields, for mid-infrared and gamma radiation detectors, photovoltaics and nano-electronics. For this last application, nano scale doping is a challenging task and monolayer doping from a chemical source is one of the most promising routes to face it. Applying this technique to Ge is therefore technologically relevant. In this work, we report about a physical method for the formation of a Sb monolayer (ML) on Ge surface by means of thermal evaporation from a Sb layer sputtered on Si, used as a remote source. Thanks to RBS analysis, we show that above 600°C, the Ge surface is stably covered with a Sb ML and up to 780°C, demonstrating a strong Sb affinity with Ge surface. At lower temperatures a thicker Sb/Ge alloy layer forms. ML formation is peculiar of Ge surface being not present on Si. SEM and AFM characterizations reveal that Ge surface has a good morphology with no surface defects, of crucial importance for nano-electronics doping process. The most relevant point is that, by means of SIMS chemical profiling we have demonstrated that Sb ML acts as an effective diffusion source, in agreement with with equilibrium diffusivity data reported in literature. According to the above results, Sb ML formation is an intriguing phenomenon highly promising for future nanoscale Ge doping processes.

Resume : Simulation and modeling are indispensable for the semiconductor technology development in leading CMOS technologies. The scope of these simulation techniques, summarized as technology aided computer design (TCAD) has dramatically increased in the last decade, as new materials were constantly introduced, combined with an ever stronger coupling of technology with design decisions. Starting from current CMOS technology, we review in a study the aspects of scaling options down to the 5/3/2nm technology nodes. The complex optimization needs to include the physics on quantized electron states, all the way to design decisions on how many tracks high the standard cell needs to be designed. The strong interaction of the device with the middle end of line contacting scheme, up to the lower level interconnect for a library cell, calls for a holistic analysis of the library cell, as simplified CV/I metrics can no longer be applied. Looking forward TCAD needs to connect electronic properties of materials with atomistic and microscopic simulations, link in a hierarchical approach to continuum descriptions, and finally combine the results in system level performance metrics. We project that added to the multi-scale complexity, the scope of simulation is further growing from classical process and device modeling, to chemical surface reaction and mechanical simulation, or full process integration modeling, all based on fundamental material analysis.

Resume : The continuing shrinkage of semiconductor devices toward nanoscale and their increased functionality using new materials and architectures tackling miniaturization, power consumption and processing speed challenges has prompted a strong need for high-resolution characterization tools capable of mapping properties of interest with nanoscale resolution. Methods to quantitatively determine the doping profile in semiconductor nanowires (NW) are strongly requested for understanding the doping incorporation in such one-dimensional structures and so as for developing NW technology. Impurity (as dopant but not only) characterization could be made by direct method based on chemical analysis using TOFSIMS , ATP , holography TEM or by indirect method using the properties induced by the impurity as electrical conductivity which play on capacitance , resistance , surface potential, etc… New approach including optical spectroscopy are also emerged and developed. SPM techniques mainly based on electrical measurements as scanning capacitance microscopy (SCM) and scanning spreading resistance microscopy (SSRM), are promising tools for two-dimensional high resolution carrier/dopant profiling on advanced metrology for future technology nodes of the microelectronics world. Some illustration will be given of 2D/3D doping profiling method especially on semiconductor nanowires technology. This approach will be completed by the possibility of using SPMs to characterize the interfaces between different materials (doping, trapping) ) and to acquire chemical information using the advantage of optical spectroscopy revealing photoinduced mechanisms as photocurrent, photocapacitance or photoinduced force.

Resume : In high integrated Front End of the Line (FEoL) process, the detection, control and quantification of the effective 2D/3D active dopant distributions are a key to optimize the design. Scanning Probe Microscopy (SPM) offers conventional electrical modes such as Conductive, Scanning Capacitance Microscopy and Scanning Spreading Resistance Microscopy to analyze a biasing probe-sample system where a conductive tip is in contact with the analyzed sample. Despite the capability, repeatability and high spatial resolution of these modes, there are limited to map type and local carrier concentration of semiconductors. Recently Scanning Microwave Impedance Microscopy (sMIM) is developed to extend the range and opens a wider analysis field. sMIM consists of a combination of an Atomic Force Microscope (AFM) with an optimized microwave network analyzer. A probe with shielded co-axial cantilever equipped to a conductive tip is used as local RF sensor, this is the strength of the sMIM. The microwave signal emanates from the tip and interacts with the surface and sub-surface of the analyzed sample. By analyzing the reflected signal, local permittivity and conductivity maps of the probed area are extracted. Electrical properties of semiconductors but also oxides, dielectrics, metals and composites are determined. We demonstrate the capability of the sMIM mode where all FeOL and BeOL (Back End of the Line) layers inside integrated PIN diode structures are revealed.

Resume : The power of Scanning Spreading Resistance Microscopy (SSRM) lies in its ability to quantitatively probe carrier concentrations at high resolution. However, it is being challenged by the scaled dimensions of sub 10 nm node devices due to lack of proper understanding of Spreading Resistance (SR) in confined volumes. The limited amount of material, the presence of interfaces, the confined current paths and the difficult back contacts may all impact the total resistance, and hence rendering the carrier quantification faulty. A good fundamental understanding is crucial for future carrier quantification with SSRM. TCAD provides an efficient way for studying the SR in sub-10nm regime for different geometrical set-ups. Here, we report a TCAD study on behavior of SR when confinement is introduced in a cylindrical slab with probe contact at the center of top surface. We report on two types of back contact configurations; one at the bottom surface of cylinder (first) and second at the curved surface (second), analogous to real configurations such as FINFET like structures. It was observed that onset of confinement effect on SR varies significantly across both configurations. In first case it took half as much thickness as it took in second case for 10% deviation in SR from its bulk value. Furthermore, we compare our simulations with experimental data and will discuss in detail the impact of confinement on the SSRM measurement and carrier quantification.

Resume : Atom probe tomography (APT) has recently emerged as a nano-analysis technique allowing for the reconstruction of the three-dimensional distribution of chemical species with sub-nanometer resolution within volumes of several tens of nm3. The recorded compositional maps allow assessing features such as alloy distributions or heterostructure compositions, shapes and interfaces. From this rich set of information it becomes possible to interpret the electronic and the optical properties of semiconductor heterostructures [1-4]. Nevertheless, it should be kept in mind that the technique also has several limitations due to the physical processes of field evaporation on which it is based, e.g., to cite two of the most important effects: (i) the degradation of the spatial resolution induced by the presence of materials with different evaporation behaviors within the same specimen (e.g., Si and SiO2) and (ii) the degradation of both spatial resolution and compositional accuracy related to the relatively low and sometimes species-specific detection efficiency [4,5]. These effects occur in the measurements under typical conditions of analysis and affect the information provided by APT. This will be shown in the case of selected systems, i.e., AlGaN epitaxial layers, GaN/AlN quantum dots and Si-based MOS transistors. These results will be critically discussed in order to underline what is the impact of the above-mentioned non-ideal features affecting typical APT measurements, and what strategies – especially based on complementary scanning transmission electron microscopy (STEM) analyses - can be adopted in order to reduce it [6,7]. [1] L. Rigutti et al., Nano Lett. 14, 107–114 (2014) [2] L. Mancini et al. Appl. Phys. Lett. 105, 243106 (2014) [3] L. Mancini et al. Appl. Phys. Lett. 108, 042102 (2016) [4] L. Rigutti et al. J. Appl. Phys. 119, 105704 (2016) [5] L. Mancini et al. J. Phys. Chem. C 118 24136 (2014) [6] L. Rigutti et al. Semicond. Sci. Technol. 31(9), 095009 (2016) [7] E. Di Russo et al. under review.

Resume : As doped regions in a finFET transistor are confined in small volumes with large surface/volume ratios, dopant incorporation and activation has become size dependent. Therefore, the electrical properties of such nanometer-wide conducting features need to be probed on devices with relevant dimensions and not on blanket films or large pads. As such, regular four-point probe measurements (with probe spacing > 40-500 µm) have become obsolete and one frequently relies on electrical characterization using multiple fins connected by metal contacts on Kelvin resistor or transmission line structures, where information on individual fins is lost. In this paper we demonstrate that, through rigorous data interpretation and refined measurement procedures, a solution based on the micro four-point probe (µ4pp) technique as implemented in the fully automated microHALL®-A300 tool of CAPRES, can be provided to measure the electrical resistance of single nanometer-wide (20-50 nm) fins without the need for metal contacts. The measured fin resistances correlate with the fin widths as measured by transmission electron microscopy and the resistances are shown to be sensitive to sub-nm width variations, allowing for detailed line width variation measurements. This solution opens the possibility to study the impact of sidewall roughness and dimension-dependent epitaxial growth or dopant diffusion/activation, which has so far been hampered by the absence a metrology solution.

Resume : The continued downscaling of micro and nanoelectronic devices is pursued with the introduction of novel materials (e.g. III-V compounds) and interfaces, frequently with 3D architectures like FinFETs. Hence, there is a growing need for quantitative characterization techniques to probe the composition of layers and narrow features. Traditional approaches using macroscopic analysis methods no longer seem applicable due to the lack of spatial resolution. In this paper, we present the composition analysis of an ensemble of InGaAs fin structures embedded in a SiO2 matrix using complementary transmission electron microscopy (TEM) and Rutherford backscattering spectrometry (RBS). We studied samples containing fins of varying width between 20 nm and 100 nm and 12.5 µm long. We performed Rutherford backscattering measurements using a 1.5 MeV He beam whose spot (0.4 x 0.4 mm2) probes an ensemble of InGaAs fins repeated uniformly and periodically. No attempt is made to perform a local analysis with a nano-focused ion beam, as this would have low accuracy due to counting statistics and may yield non-representative data on an individual outlier device. Rather, the summation over an ensemble of structures leads to statistically relevant data. As RBS signals from different materials appear isolated in the experimental spectrum, we show that it is possible to identify the signal from the fins if those are embedded in a matrix of different, preferably lighter elements. In RBS, not only compositional variations but also variations in the geometry of the fins will have an impact on the detected signals. We used TEM to gain knowledge on the geometry of the fins. The geometrical information obtained from the TEM analysis is used as input in the program StructNRA [1] to analyze the RBS spectra. We prove that the structural information is essential to analyze the RBS spectra. With this work, we demonstrate that it is feasible to use Rutherford backscattering spectrometry to probe the composition of periodic arrays of fins. The reported advancement provides a standardless, quantitative and time efficient tool for the analysis of an ensemble of fins with relevant statistics for process control. Keywords: RBS, hybrid metrology, InGaAs fins. REFERENCE [1] M. Mayer. Nucl. Instr. Meth. B 371 (2016) 90–96.

Resume : The integration of III-V semiconductor devices on silicon is one of the most challenging topics in current electronic materials research. III-V materials have interesting physical properties, such as a high carrier transport, direct and wide band gap and their integration on silicon will add new functionalities in opto- and micro-electronic applications. However, the integration of III-V on Si faces growth related challenges, i.e. a thermal and lattice mismatches of semiconductors, which affect the device operation. Moreover, given the complexity of the devices in terms of chemical composition as well as in dimension, their accurate characterization has become difficult and sometimes challenging. In this work, the physico-chemical studies of III-V heterostructures directly grown on 300 mm Si wafers by metalorganic vapor phase epitaxy are addressed by the mean of Time of Flight Secondary Ion Mass Spectrometry (ToF-SIMS) and Atom Probe Tomography (APT). These two techniques have emerged as unique that are able to provide information on the chemical composition of elements together with a 3D map indicating the position of each atom from a specimen. Firstly, topography formation under oxygen irradiation of GaSb/InAs multilayers using atomic force microscopy was investigated and correlated with TOF-SIMS profiles in order to improve the depth resolution. Secondly, atomic composition and dopant distribution in Si-doped GaAs thin layers were analyzed by TOF-SIMS and APT and then correlated to the electrical properties.